Analog/digital converters (ADCs) are used, for example, as integrated circuits (ICs) in various applications. For example, analog/digital converters are used for converting measurement signals into the digital domain. Frequently, the corresponding digital output signals are used as a basis for deciding about following processes. It is, therefore, typically worth the effort to perform a precise conversion of the analog input signal. This is because the integrity of the measurement or of the decision-making depends typically on the level of confidence of the conversion. Higher signal noise can lower the integrity of the measurement in this context, or of the decision-making.
Techniques are known for reducing signal in the analog/digital conversion. For example, it is known to combine a number of measurements by forming the mean value of N signal values in the digital domain and by this means to reduce especially uncorrelated signal noise. In this context, the signal noise will be typically reduced by a factor of 1/N to σ2/N, σ2 designating the noise variance and N being the number of averaged signal values. For example, the formation of the mean value can take place by means of a moving average filter. Such a moving average filter can be implemented in a simple manner in the digital domain by means of delay elements and adding elements. A disadvantage of such a technique is that the bandwidth of the digital output signal is reduced due to the corresponding low-pass filtering. The speed or reaction which is available for making the decision is therefore typically limited or reduced. For example, the digital output signal reflects the value of the input signal only after a delay of (N−1)T in the case of a step function in the case of an averaging of N sampling points. In this context, T designates the time between two adjacent sampling points.
In some applications—for example for analog input signals having a strong time-dependence—such a low-pass filtering can reduce the bandwidth of the digital output signal by an unacceptable amount.
Often, a decimation of the digital output signal is performed after the low-pass filter in such cases of low-pass filtering in the digital domain. This is based on the finding that the bandwidth is limited in any case due to the low-pass filtering so that, typically, no advantage can be achieved from it if the digital output signal has the same sampling frequency as the analog/digital converter. For example, the frequency of the digital output signal could be reduced from 1/T to a value of 1/(N×T). For such a case, no delay can be observed in the example, described above, of the step function at the analog input signal; this is the case since the entire system has an operation which corresponds to that of an analog/digital converter which operates with a lower sampling frequency. The reduction achieved in the signal noise is still α2/N but the sampling rate originally used at the analog/digital converter is not available at the output. Such an approach is, therefore, comparatively inefficient with respect to the processing speed and power consumption.
In order to avoid aliasing effects, it may typically be additionally necessary to perform a bandwidth limiting of the analog input signals in the analog domain by means of an analog filter. Alternatively, sampling frequencies with a random scheme, for example by additive random sampling, jitter, etc. can be applied in order to avoid the aliasing, effect. Such techniques, in turn, exhibit the restriction of a not mandatory deterministic sequence and complicated signal processing.